1. Field of the Invention
The present invention relates to a method for producing a bonded wafer.
2. Description of Related Art
Conventionally, silicon-on-insulator (SOI) which has a handle substrate formed of a transparent insulating substrate and which includes silicon-on-quartz (SOQ), silicon-on-glass (SOG) and silicon-on-sapphire (SOS), and bonded wafers (in this case, a semiconductor substrate is transparent) provided by combining a transparent wide-gap semiconductor made of GaN, ZnO, diamond, AlN, etc., with a donor substrate made of silicon, have been proposed, and have been expected to find various applications. The SOQ, the SOG, and the SOS are expected to find use in projectors, radio frequency devices, etc., for their insulating properties and transparency. Furthermore, bonded wafers, in which a film of a wide-gap semiconductor is combined with a handle substrate, use only a very little expensive wide-gap semiconductor material corresponding to a thickness of some hundred nanometers to some micrometers, so that significant cost reduction may be achieved. Thus, they are expected to find use in high-performance lasers, power devices, etc.
Conventional SOI producing techniques based on bonding are broadly classified into two processes. One is the SOITEC process in which a silicon substrate (donor substrate) pre-implanted with hydrogen ions at room temperature and a substrate (handle substrate) to be used as a support substrate are bonded to each other, are subjected to a heat treatment at a high temperature (near 500° C.) to generate a number of microbubbles called microcavities at the ion-implanted interface, and are delaminated at the interface so that a silicon film is transferred onto the handle substrate.
The other is a process called the SiGen process in which a silicon substrate also pre-implanted with hydrogen ions and a handle substrate are bonded to each other after the surfaces of both substrates are activated with a plasma treatment, and then the substrates are mechanically delaminated from each other at the hydrogen ion-implanted interface.
However, since different types of substrates are bonded for the combination of the materials mentioned above, the thermal expansion coefficient of a semiconductor substrate does not match the thermal expansion coefficient of a donor substrate. The SOITEC process has the drawback in that one or more substrates crack due to a large difference in thermal expansion coefficient when different types of substrates as described above are bonded, because a heat treatment at a high temperature (about 500° C.) for heat delamination at a hydrogen ion-implanted interface is conducted after bonding. Compared with the SOITEC process, the SiGen process provides a high bonding strength at the time when the substrates are bonded with a surface activation treatment, and can provide a higher bonding strength with a heat treatment at a relatively low temperature at about 250° C. to 350° C. However, during the progress of the experiments in which the invention was made, it was found that when the substrates bonded at room temperature are heated to this temperature range, either or both of the substrates are subjected to breakage or formation of an untransferred portion, due to difference in thermal expansion coefficient between the two substrates. On the other hand, for the ion-implanted interface to be embrittled, a proper heat treatment is required, so that avoiding a heat treatment at temperature between 150° C. to 350° C. is undesirable.
As a result, the problems may occur that a substrate or substrate are subjected to breakage due to difference in thermal expansion coefficient between the bonded substrates, an untransferred portion is formed in a silicon film to be transferred, etc. This is because temperature rise increases a bonding strength at a bonding interface, but it also causes detachment induced by warpage resulting from different types of substrates being bonded, so that in-plane bonding does not progress uniformly. When the substrates are bonded, and then subjected to a high temperature treatment as they are, the problem of crack formation in the substrate, or the problem of detachment of the bonded substrates arises.
Thus, there is the disadvantage that adopting a high temperature process (at about 500° C.) for heat delamination at a hydrogen ion-implanted interface after bonding is difficult because of difference in thermal expansion coefficient between a semiconductor substrate and a handle substrate, so that conventional processes typified by the SOITEC process are difficult to be adapted thereto.
For example, if a donor substrate and a handle substrate used for the bonding above are respectively a silicon substrate and a quartz substrate, established is the following relationship: the thermal expansion coefficient of the donor substrate>the thermal expansion coefficient of the handle substrate. It was experimentally found that for a composite substrate which satisfies the relationship above, delamination starts from the ion-implanted interface so that a silicon film is successfully transferred with the SiGen process, etc., described above due to the way that internal stress is produced and a silicon substrate breakage mechanism.
However, the handle substrate is made of a material such as aluminum oxide, aluminum nitride, silicon carbide, silicon nitride, sialon, gallium nitride, etc., established is the following relationship: the thermal expansion coefficient of the donor substrate<the thermal expansion coefficient of the handle substrate. The inventors' experimentation has found that in this case, there arises the problem that a phenomenon occurs in which delamination does not start from the ion-implanted interface and either or both of the handle substrate and the donor substrate cracks.
An example of the prior art can be found in Japanese Patent Publication JP 2008-114448 A.